Webinar: Unlocking Semiconductor Innovation – The Power of System Technology Co-Optimization

Designing analogue/mixed-signal ICs is a major challenge in ASIC development, with tight specifications and ambitious tapeout schedules that are challenging to meet. Many manual design steps from architecture to layout verification limit early insight and drive time-consuming design iterations. In this webinar, we will provide you with an overview of approaches that support and simplify A/MS design. The methods cover reuse, early layout insights, and layout automation. The webinar will include demonstration parts to showcase the approaches.

Referent: Dr.-Ing. Benjamin Prautsch, Leiter Geschäftsfeld »Chiplet und Chipdesign«

Sprache: Englisch