Microelectronics

Applied Materials: New Systems Unveiled to Accelerate DRAM and Advanced Packaging for AI Chips

June 25, 2026. Applied Materials, the market leader in materials technology for the semiconductor industry, today unveiled a series of new chip manufacturing systems designed to enable the advanced 3D chip architectures that power next-generation AI.

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Computing performance in the AI sector is increasingly limited by memory, as demands for model size and data transfer exceed advances in bandwidth, capacity, and energy efficiency. This growing “memory barrier” is accelerating the adoption of advanced packaging architectures, including High-Bandwidth Memory (HBM) and 3D stacking. These technologies deliver dramatic improvements in bandwidth and efficiency but present new challenges in terms of process complexity. Applied is supporting this transition with a materials technology portfolio that spans DRAM, advanced packaging, and process control, thereby expanding its leadership in each of these areas to help customers bring a new generation of AI chips into production faster and with higher yields.

Improved Epitaxy Brings Logic-Class Technology to the Next Generation of DRAM

Epitaxy has been used for years in state-of-the-art logic technology, where the precise growth of a crystalline material in the transistor channel has boosted performance far beyond what can be achieved through geometric scaling alone. These same techniques are now also becoming critical in the peripheral transistors of DRAMs. More than a decade ago, Applied pioneered silicon-germanium epitaxy in transistor channels with its Centura™ Prime™ Epi system.

Enhanced Centura™ Prime™ Epi 

Applied is now introducing an enhanced Centura™ Prime™ Epi system that selectively deposits doped silicon-germanium and silicon-phosphorus in source/drain regions, combining advanced voltage engineering with precise doping control. The result is higher drive current and greater transistor efficiency, enabling faster and more energy-efficient DRAM operation—essential for the bandwidth requirements of next-generation HBM and DDR. The new system also features a 20% smaller footprint, enabling higher equipment density and faster capacity scaling in DRAM fabs.

“The transistor and material technologies that have driven performance gains in cutting-edge logic chips are now becoming indispensable in the DRAM sector as well,” said Dr. , President of at Applied Materials. “As DRAM scales to meet the bandwidth requirements of HBM and AI workloads, the line between logic and memory process technology is becoming increasingly blurred. By leveraging our leadership in epitaxy for cutting-edge logic technology, Applied is uniquely positioned to drive this transformation in the DRAM sector.”

New CMP and deposition systems target the most critical steps in advanced packaging

In recent years, advanced packaging has become just as strategically important to the computer industry as transistor scaling on the chip. Modern AI server chips combine trillions of transistors by integrating multiple chips into a single package. HBM is a leading example of this approach, in which DRAM chips are stacked on top of one another and interconnected via through-silicon vias (TSVs). Applied is the market leader in process equipment for advanced packaging, including systems that cover most of the material-processing steps required to manufacture the TSVs, copper pillars, and microbumps that connect the stacked chips. Today, Applied is introducing three new systems designed to address the most critical process steps in advanced packaging.

Opta™ Quad CMP

Building on Applied’s leadership in chemical-mechanical planarization (CMP), the Opta™ Quad platform was specifically developed for advanced packaging, where thicker layers, longer polishing times, and tighter tolerances increase the risk of non-uniformity and yield losses. Opta Quad continuously monitors the condition of the wafers during the polishing process and dynamically adjusts in real time, thereby improving in-wafer uniformity and control of total thickness variation. This is particularly critical for hybrid bonding—an emerging 3D stacking technology in which copper interconnects and surrounding dielectrics from two chips are fused together in a single step, requiring near-perfect surface planarity for high-yield results.

Nokota™ VMax™ 2 ECD

As 3D stacks become increasingly miniaturized, uneven bonds can leave gaps that prevent reliable contact between layers. Ensuring that the TSVs and microbumps are flat across the entire wafer is critical to stack yield. Nokota™ VMax™ 2 is an electrochemical deposition (ECD) system, designed for high-precision copper plating across a wide range of next-generation packaging applications—from TSV filling for 3D stacking to fine-pitch interconnects such as microbump formation. Nokota VMax 2 introduces Adaptive Pattern Tuning (APT), which dynamically shapes the electric field to correct layout-related variations and improve coating uniformity across the entire wafer.

Producer™ Avila™ 2 PECVD

To accommodate more layers in a stack, HBM chips are thinned to about 1/25 the thickness of a standard wafer, making them susceptible to warping and twisting. These effects intensify with each added layer and increase the risk of bonding failures and yield losses. Producer™ Avila™ 2 is a PECVD (Plasma-Enhanced Chemical Vapor Deposition) system, which improves the mechanical stability of ultra-thin DRAM chips by depositing stress-relieving dielectric layers around TSVs, thereby enabling reliable stacking of HBM designs with 12, 16, and, in the future, even more layers. In addition to HBM, the system supports a range of advanced memory and logic integration concepts.

“Advanced packaging techniques have become a key driver of system-level performance, and the complexity of next-generation 3D architectures requires a new level of precision at every process step,” said Raja. “Applied’s leadership in dielectric CVD, ECD, and CMP—combined with deep expertise in process integration—provides customers with the tools they need to scale 3D stacks reliably and with high yield.”

New eBeam systems bring process control from wafer fabrication to advanced packaging

Advanced packaging fabs face challenges related to defects and metrology that were previously exclusive to wafer fabs. Feature dimensions have fallen below the resolution limit of optical inspection tools, and particles that were once tolerable with larger bumps now impact yield. A single defect can result in an entire HBM stack being scrapped, making process control a strategic priority. Applied is expanding its leadership in the eBeam sector with two new systems developed specifically for advanced packaging—both are designed to handle a wide range of substrate geometries and materials.

VeritySEM™ 7AP CD Metrology

As the newest addition to Applied’s VeritySEM™ portfolio for critical dimension (CD) measurement, the VeritySEM™ 7AP enables the precise measurement of structures on thick, heterogeneous, and highly warped substrates, such as those commonly found in HBM and chiplet architectures. VeritySEM AP systems automatically adapt to different sizes and materials, offering sensitivity in the sub-10-nm range—orders of magnitude better than optical measurement instruments.

SEMVision™ G7AP Defect Analysis

SEMVision™ is the industry-leading eBeam defect analysis platform. SEMVision™ G7AP further expands Applied’s leadership in advanced packaging and enables high-resolution defect inspection and automated classification on silicon, organic, and glass substrates. The system can accelerate yield optimization by helping customers quickly distinguish critical defects from noise. SEMVision G7AP is already in use at leading memory and logic manufacturers and supports mass production in the field of advanced packaging.

“Applied has been a pioneer in eBeam technology for decades,” said , Group Vice President and General Manager of at Applied Materials. “As the geometries of advanced packaging technologies fall below the resolution limit of optical tools, packaging fabs need eBeam-level precision to both re-detect and classify defects. With the development of the VeritySEM 7AP and SEMVision G7AP systems, Applied is transferring its proven expertise from wafer fabrication to the field of packaging—specifically tailored to the substrates and defect challenges of 3D architectures.”

A media kit with additional information on the new systems is available on the Applied Materials website. Further details on Applied’s advanced technologies will be presented during the company’s DRAM and Advanced Packaging event, which is taking place later today.

About Applied Materials

Applied Materials, Inc. (Nasdaq: AMAT) is the market leader in materials technology solutions that form the foundation for virtually every new semiconductor and advanced display worldwide. The technologies we develop are essential for advancing AI and accelerating the commercialization of next-generation chips. At Applied Materials, we push the boundaries of science and engineering to create material innovations that change the world. 

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Related Links

👉 www.appliedmaterials.com  

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Contact info

Silicon Saxony

Marketing, Kommunikation und Öffentlichkeitsarbeit

Manfred-von-Ardenne-Ring 20 F

Telefon: +49 351 8925 886

redaktion@silicon-saxony.de